Dataflow Architectures for GALS

Dataflow Architectures for GALS

In Kahn process network (KPN), the processes (nodes) communicate by unbounded unidirectional FIFO channels (arcs), with the property of non-blocking writes and blocking reads on the channels. KPN provides a semantic model of computation, where a computation can be expressed as a set of asynchronously communicating processes. However, the unbounded FIFO based asynchrony is not realizable in prac...

System-level Clustering and Timing Analysis for GALS-based Dataflow Architectures

In this paper, we propose an approach based on dataflow techniques for modeling application-specific, globally asynchronous, locally synchronous (GALS) architectures for digital signal processing (DSP) applications, and analyzing the performance of such architectures. Dataflow-based techniques are attractive for DSP applications because they allow application behavior to be represented formally...

Generalized Latency-Insensitive Systems for GALS Architectures

Latency-insensitive systems were recently proposed by Carloni et al. for the design of single-clock systems-on-a-chip (SoC’s) using predesigned IP blocks. The goal of this paper is to extend and generalize latency-insensitive systems in such a way that they can be applied to GALS architectures with multiple clocks. In particular, we propose two extensions. The first extension allows each synchr...

Request-driven GALS Technique for Datapath Architectures

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Simulator for Heterogeneous Dataflow Architectures